1. Technical Field
The invention relates to the field of semiconductor switching devices for switching at high frequencies, and more particularly to a semiconductor single pole, double throw (SPDT) switching device or multi-throw (multi-output) switches operating in the radio frequency ranges.
2. Background Art
Many radio frequency (RF) switches are used in transit and receive (T/R) modules for active array radars. Integrated into Gallium Arsenide (GaAs) monolithic microwave integrated circuits (MMICs), these switches control the flow of RF to and from an antenna to various active circuits such as sections of the attenuator, phase shifter, and select the Transmit or Receive path (T/R switch). The insertion loss of such switches is a critical parameter which affects module noise figure and efficiency. The achievable insertion loss of such an RF switch is driven by the product of the switch's on state resistance and off state capacitance. A lower on resistance reduces insertion loss, but scaling up device width in order to achieve lower on state resistance increases the switch's capacitance, which has an adverse effect on a switch's off state isolation, so this method of scaling down insertion loss involves an undesirable tradeoff.
A typical Single Pole Double Throw (SPDT) switch integrated into a pHEMT (pseudomorphic high electron mobility transistor) MMIC consists of four switches which join three RF ports and ground. The “series” switch between two of the RF ports is enabled to allow RF to flow through that path. The “shunt” RF switch on the remaining port is enabled to short it to ground.
The control levels for these switches have traditionally been either 0 V/−5 V or 0 V/−3.3 V derived from a silicon control application-specific integrated circuit (ASIC). In the depletion mode pHEMT technology used in most MMIC designs, with zero volts gate to source, a switch device is ON, and with −5 V on the gate electrode the device is OFF.
Even though with zero volts on the gate a pHEMT switch is ON, it is well known that the resistance of a pHEMT device decreases further as the gate source voltage is increased above zero volts. The voltage that can be applied is limited by the pHEMT devices Schottky Diode gate forward biasing. While it is possible to use dual supply voltages on an external control ASIC to take advantage of this effect, it is inconvenient to do so, and it is difficult to maximize the advantage of doing so by matching the positive swing to the pHEMT process diode drop since this changes with temperature.
U.S. Pat. No. 7,206,552 teaches a switch that differs from the present invention in that it does not include a shunt element. It is believed that no explicit teaching of the biasing method of the gate electrodes of the FET switches is given. It is also believed that a pair of transistors with differing pinch off thresholds is used thereby likely requiring a customized GaAs process.
U.S. Pat. No. 5,834,975 teaches the use of RF switches as a controllable power combiner. The switches disclosed are micro-electromechanical (MEMS), which may be the lowest loss switch technology available. The present invention involves integrated biasing with a GaAs switch.
U.S. Pat. No. 6,440,767 discloses an RF SPDT switch; however, it is mechanical in nature (MEMS technology), rather than solid state as is the present invention (GaAs technology).
U.S. Pat. No. 6,876,056 also teaches a MEMS switch with a moveable element, rather than solid state (GaAs technology).
U.S. Pat. No. 4,626,806 shows a SPDT RF switch, but it is implemented as with PIN diodes rather than field effect transistor (FET) or pHEMT switches.
U.S. Pat. No. 6,486,511 teaches a SPDT RF switch, but it relies upon a custom very high resistance gate material. Such switch is shown as silicon (Si) technology, rather than GaAs. The biasing of the present invention is not applicable to such a type of switch since it does not have a diode type gate terminal (like pHEMT and JFETs do).
While the above cited references introduce and disclose a number of noteworthy advances and technological improvements within the art, none completely fulfills the specific objectives achieved by this invention.